The following disclosure relates to electrical circuits and signal processing.
A charge-pump is a useful circuit for a variety of applications. A charge-pump receives a reference voltage input and provides an output voltage to a load circuit of that is a multiple (integer or non-integer) of the reference voltage. A charge-pump can be useful in many types of circuits, for example, a charge-pump can be used as a source for a voltage regulator loop. The voltage regulator loop can operate to provide a consistent desired output voltage over changes in process, voltage, and temperature (“PVT”).
FIG. 1 illustrates a conventional charge-pump 100. Charge-pump 100 includes two identical mirror circuits 102 and 104 connected to output Vcp by two switches S1 and S2. The mirror circuits 102 and 104 provide a step-up voltage to the output Vcp in alternate cycles provided by clocks CLK. Typically, the mirror circuits 102 and 104 are designed to provide a step-up of substantially twice a reference voltage, Vref. Specifically, mirror circuit 102 includes clock controlled digital logic inverters D1 and D2 supplied by Vref, capacitors C1 and C2, and transistors M1 and M2 defining nodes N1, N2, and N3.
When the clock CLK provides a logical 1 signal at node N1, node N2 falls to a logical 0 (due to inverter D1) while node 3 rises to a digital 1 (due to inverter D2 inverting the logical zero output from inverter D1). The inverters D1, D2 are supplied by Vref so that when either output is a logical 1, the output voltage from the respective inverter is Vref. In the example above (CLK providing a logical 1 at node N1), node 3 rises to a voltage value of Vref. Since the value of node 2 is zero, the voltage at point V2 decreases causing transistor M2 to cut off. The resulting voltage at V1 consequently increases to substantially 2Vref. When the clock cycles so that node N1 transitions to a logical 0, V2 continues to bias transistor m1, resulting in an output at node V1 equal to Vref. Switch, S1, can be disconnected from output Vcp when V2 does not equal 2Vref. The mirror circuits 102 and 104 are designed with complementary clock cycles that alternate output voltages of substantially 2Vref in order to provide dual cycle pumping at a near constant supply of 2Vref to output Vcp.
Typically, the input voltage to charge-pump 100 is a constant Direct Current (“DC”) source Vref. The output voltage, Vcp, is typically substantially double Vref. However, in a conventional charge-pump the voltage characteristic of Vcp over time is not smooth. Small deviations in the output Vcp can occur as a result of the alternating clock signals. Voltage ripples, or noise, typically occur at a regular period related to the frequency of the clock cycles of the charge-pump. This voltage noise can be significant enough to interfere with circuit functions.
FIG. 2 shows a conventional application of a charge-pump 100 as a source for a voltage regulator loop 200. Voltage regulator loop 200 includes a feedback loop that works to maintain a constant output. Voltage regulator loop 200 includes amplifier 202, transistors 204 and 206, and resistors 208, 210 and 213. Charge-pump 100 provides a voltage to gate 212 of transistor 206, which activates transistor 206. The gate voltage is designed to bias transistor 206 such that transistor 206 provides a desired output, Vout. If, for example, the output Vout decreases, the feedback loop operates to increase the gate voltage in order to restore the desired output Vout. The noise inherent in the charge-pump output can interfere with the functioning of transistor 206 and result in instability of the regulator loop 200. For example, large fluctuations in the voltage characteristic can cause transistor 206 to deactivate, shutting down the voltage regulator loop 200. Additionally, Vref and charge-pump 100 can be susceptible to fluctuations over PVT, causing further variability at gate 212 of transistor 206.
One method of reducing the effect of the voltage noise is to insert a filter into the regulator loop 200. One typically used filter is a bypass capacitor 214. The bypass capacitor 214 works to establish an AC ground in a given circuit. The bypass capacitor 214 suppresses the AC component of the output signal. The larger the bypass capacitor 214 the greater the ripple that can be suppressed. However, circuit limitations can prevent the use of large bypass capacitors 214. For example, since the bypass capacitor 214 is located within the voltage regulator loop 200, the bypass capacitor 214 changes the loop dynamic. Large capacitance values of bypass capacitor 214 can interfere with the operation of the voltage loop 200 leading to circuit instability.
FIGS. 3a and 3b illustrate the voltage noise at the gate of transistor 206 and the output voltage, Vout, for the voltage regulator loop 200, respectively. Bypass capacitor 214 reduces the magnitude of the noise, however significant voltage ripple can remain at gate 112 which can cause stability problems with other circuits connected to the voltage regulator loop 200 as well as impact the feedback loop of the voltage regulator.